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Sasan Iman

  • SystemVerilog Functional VerificationSystemVerilog Functional Verification
  • Logic Synthesis for Low Power VLSI DesignsLogic Synthesis for Low Power VLSI Designs
  • Logic synthesis for low power VLSI designsLogic synthesis for low power VLSI designs
  • Step-by-step functional verification with SystemVerilog and OVMStep-by-step functional verification with SystemVerilog and OVM
  • System Verilog Functional VerificationSystem Verilog Functional Verification
  • The E hardware verification languageThe E hardware verification language